A solid-state imaging device is largely divided into a Charge Coupled Device (CCD) type solid-state imaging device and a Complementary Metal Oxide Semiconductor (CMOS) type solid-state imaging device.
In such a solid-state imaging device, a light sensing portion formed of a photodiode is formed in each pixel and, in the light sensing portion, signal charges are generated by photoelectric conversion by light incident to the light sensing portion. In the CCD type solid-state imaging device, the signal charges generated by the light sensing portion are transferred into a charge transfer unit having a CCD structure, and pixel charges are converted into pixel signals that are outputted as an output signal. On the other hand, in the CMOS type solid-state imaging device, the signal charges generated by the light sensing portion are amplified in each pixel and the amplified signals are output to signal lines as pixel signals.
With the distance between a photodiode formed on a substrate and a light incident surface being reduced to improve focusing efficiency, there has been proposed a rear-surface irradiation type solid-state imaging device for making light incident from a rear surface side which is opposite to a side, in which a wiring layer is formed, of the substrate. In this rear-surface irradiation type solid-state imaging device, after the wiring layer is formed on a front surface side of the substrate, on which the photodiode or a pixel transistor is formed, the substrate is reversed, and a color filter layer and an on-chip lens is formed on the rear surface side of the substrate. In the rear-surface irradiation type solid-state imaging device, since the substrate is reversed and the color filter layer or the on-chip lens is then formed on the rear surface side of the substrate, an alignment mark necessary for positioning the color filter layer or the on-chip lens is formed on the rear surface side of the substrate. In addition, in the rear-surface irradiation type solid-state imaging device, in order to lead out an electrode pad forming region formed in the wiring layer of the front surface side of the substrate to the rear surface side of the substrate, an opening where the electrode pad forming region is exposed is formed from the rear surface side of the substrate. In order to connect an external wiring from the rear surface side of the substrate, an opening where the electrode pad forming region is exposed is formed.
Japanese Unexamined Patent Application Publication No. 2005-150463 describes a method of forming an alignment mark in a rear-surface irradiation type solid-state imaging device and a method of forming a pad contact connected to an electrode pad. In Japanese Unexamined Patent Application Publication No. 2005-150463, in order to form the alignment mark or secure an insulation property between the pad contact and a substrate, a configuration in which, after an opening is formed in the substrate, an insulating material such as SiO is buried so as to form an insulating layer is described.
A process of manufacturing a rear-surface irradiation type solid-state imaging device of the related art will be described with reference to FIGS. 25A to 25C. FIGS. 25A to 25C shows a process of manufacturing a rear-surface irradiation type solid-state imaging device in the case where an alignment mark and an insulating layer around an electrode pad portion is formed of SiO.
First, as shown in FIG. 25A, using an SOI substrate 103 in which a buried oxide film (BOX layer 101) and a silicon layer 102 are sequentially formed on a silicon substrate 100, a pixel including photodiodes PD is formed at a predetermined position of a pixel region 108 of the silicon layer 102. Thereafter, after an oxide film 104 is formed on the surface of the silicon layer 102, an opening reaching the BOX layer 101 through the silicon layer 102 is formed in an alignment mark forming region 107 and an electrode pad forming region 106. Then, an insulating material formed of SiO is buried so as to form an insulating layer 105.
Next, a plurality of wiring layers 109 is formed on the surface of the silicon layer 102 with an interlayer insulating film 110 interposed therebetween so as to form a multi-layer wiring layer 111.
Thereafter, a support substrate (not shown) is formed on the multi-layer wiring layer 111, the element is reversed, and the silicon substrate 100 and the BOX layer 101 of the SOI substrate 103 are polished. Then, an opening is formed in a region surrounded by the insulating layer 105 formed in the electrode pad forming region 106 such that an electrode pad 112 is exposed. Using the insulating layer 105 formed in the alignment mark forming region 107 as an alignment mark, a color filter layer 114 and an on-chip lens 113 are formed on the silicon layer 102 of the pixel region 108. Accordingly, the rear-surface irradiation type solid-state imaging device is completed.
However, in the manufacturing method of the related art, when the silicon substrate 100 and the BOX layer 101 are etched and removed, the alignment mark 105a or the insulating layer 105 formed of SiO may be etched. Then, as shown in FIG. 25C, the alignment mark 105a or the insulating layer 105 of the electrode pad forming region are excessively removed to a position deeper than the surface of the silicon layer 102. Since the alignment mark 105a is excessively etched and removed, visibility deteriorates. In the case where the alignment mark 105a is formed so as to protrude from the rear surface side of the silicon layer 102 so as to improve visibility, an insulating material other than SiO is used in the alignment mark 105a. 
The alignment mark 105a or the opening formed in the insulating layer 105 of the electrode pad forming region 106 has a relatively high aspect ratio. Therefore, when SiO is used as a material buried in the opening, it is difficult to bury the opening. As shown in FIG. 26, a void 120 is generated.
In order to solve the above problem generated when SiO is used in the alignment mark 105a, silicon nitride SiN may be used as an insulating material buried in the opening. In this case, in the process of FIG. 25A, as shown in FIG. 27A, after an opening for an alignment mark is formed, an insulating material 116 formed of SiN is buried in the opening.
In the process of manufacturing the solid-state imaging device, after a process of burying the insulating material 116 which becomes the alignment mark 105a, for example, a process of removing the insulating material 116 on the oxide film 104 is performed. For example, in the case where the unnecessary insulating material 116 formed of SiN on the oxide film 104 is removed using hot phosphoric acid, as shown in FIG. 27B, the upper portion of SiN formed as the alignment mark 105a or the insulating layer 105 of the electrode pad forming region 106 is etched and removed. Then, unevenness denoted by a region a is formed in the upper portion of the insulating layer.
In the case where unevenness is formed, as shown in FIG. 28A, for example, polysilicon 118 is deposited on the etched-off insulating layer 105. In this case, a short circuit between the polysilicon 118 and the silicon layer 102 occurs. Then, in the electrode pad forming region 106, insulation between the silicon layer 102 and a contact wiring (not shown) connected to the electrode pad 112 is not secured. As shown in FIG. 28B, in the case where a silicon oxide film 117 is formed on the etched-off insulating layer 105 in a subsequent process, the silicon oxide film 117 on the insulating layer 105 with unevenness is peeled. In this case, wafer contamination or device contamination may occur.
Even in the case where the insulating layer 105 is formed of silicon oxide, silicon oxide configuring the upper portion of the insulating layer may be removed when the unnecessary silicon oxide is removed. Even in this case, the problem of FIG. 28A or 28B occurs.